DARPA awarded Grandis Inc. $8.6 million for the second phase of a research project developing spin-transfer torque random access memory (STT-RAM) chips. STT-RAM is a next-generation, solid-state memory technology that is dense, fast, nonvolatile, and radiation-hard, making it suited for defense applications. The program is being carried out by a collaboration between Grandis, the Universities of Virginia and Alabama, and the College of William and Mary. Additional support has been provided by the National Institute of Standards and Technology and the Naval Research Laboratory. During Phase II, work will ultimately include test and verification of STT-RAM integrated memory arrays. The outcome of this DARPA program could lead to advancements in military and space electronics by delivering sophisticated solid-state memory devices for mission-critical applications.