Success on the modern battlefield depends on the rapid collection and processing of vast quantities of information. As new platforms and sensors are fielded at an ever-increasing rate, the challenge of processing and analyzing the flood of intelligence grows exponentially.
Engineering and program managers who develop, select, and integrate solutions for these programs have a very difficult job. They must carefully evaluate performance requirements and constraints and then select the best form factor and architecture to service each operating environment in the program’s life cycle.
A military aerospace program moves from a requirements document to a fielded product over a period of years. During that journey much of the development work is done in a traditional office or lab environment while the end product frequently ends up a world away in ground stations, field command posts, rugged field (vehicle-mounted for example), traditional fixed wing aircraft, or UAV platforms. Each has its own set of unique needs and requirements on things such as size, weight, and power (SWaP) utilization.
In the past, performance limits on small, portable high-performance computing meant data had to be collected for later processing and analysis, reducing the effectiveness of this valuable information.
Numerous computing options are available, and many are specifically designed with a particular operating environment in mind. But this variety increases complexity, risk, and cost in the development cycle. Fortunately, with advances in military high-performance computing, there are new ways to mitigate those challenges and to process large amounts of data in motion, delivering real-time results to war fighters in the sky or on the ground.
Over the years, a number of form factors and architectures have been developed to address individual military high-performance computing requirements including PC/104 (-Express), COM Express, VME/cPCI/VPX, and MicroTCA/ATCA. Unfortunately, none of these is able to span the entire developmental journey of a military aerospace program, from an office or laboratory environment to rugged fielded computing solution.
PC/104 (-Express) was primarily developed to address the needs of the embedded computing market through a stackable board design. It is useful for very space-limited applications, but due to generally limited bandwidth and scalability it is not well-suited for more demanding tasks such as radar or image processing that requires multiple processors and large memory blocks. In addition, multiboard configurations (four or more) are not uncommon and often lead to heat dissipation issues and designs that consume a significant amount of vertical space.
The COM Express architecture is also a somewhat stackable design that was developed to address some of the shortcomings of the PC/104 architecture and add new technological capabilities. A single COM Express card can have the same processing capabilities as multiple PC/104 cards, although the limited memory footprint can limit application performance for more demanding applications. COM Express solutions require a custom carrier card on which to stack, dramatically adding to the overall system size and increasing project risk and complexity.
The VME/VME64/cPCI/VPX form factor/architecture is geared at the mission computing or traditional military aerospace market. While it includes designs that easily address environmental or ruggedized compute requirements, interoperability and compatibility issues have challenged VPX developers for years.
A new OpenVPX (VITA 65) interoperability framework was designed to improve interoperability over time, but at over 400 pages in length the specification still far from guarantees seamless integration. In addition, many fielded systems are hybrids, composed of multiple “standards.” The lack of a common provider means that developers cannot utilize a single development environment, which increases complexity, time-to-solution, and risk.
MicroTCA/ATCA is a form factor/architecture developed primarily for telecommunications computing applications and has been repurposed to service the military aerospace market. Because of its relatively large board footprint and extreme power draw, its use is not practical for most SWaP-limited applications. Additionally, unlike other form factors/architectures, the central backplane design creates a single point of failure, resulting in a number of “bent pin” failures particularly during servicing.
Within each of these form factors, developers must then make a number of other assessments, such as which type of processor is best for a particular application (Power PC, Intel, GPGPU, reconfigurable processors/FPGAs.) Once a type is selected, which individual processor (speed, cache, etc.) should be selected? How many processors and cores are needed? What is the processor scalability for the application? The list goes on.
Achieving maximum performance is a function of a fully integrated balanced system, not simply a collection of individual components. For example, if an input device is selected that can deliver 10 GB of data per second, the solution as a whole is useless if the interconnect can only handle half that.
Program and engineering managers must either select a one-size-fits-all architecture and form factor vs. one that excels in a particular area but is sub-optimal in others, or use multiple architectures and form factors to span the range of targeted missions. Selecting multiple solutions limits software reuse and involves increased complexity, the use of more development resources and time, increased support and training requirements, more difficult inventory control and parts management, and ultimately increased overall program risk.
The use of a single unified computing architecture solves many of these issues and provides significant time-to-solution advantages. Engineering managers can be confident in the knowledge that the work they are doing in the lab will function identically in the field regardless of whether it’s in a Humvee or flying overhead in a UAV.
Also, selecting a compute supplier that has already optimized their platform performance across multiple form factors and who provides a standard high-level language programming environment allows engineering managers to immediately begin focusing on the big picture of system functionality instead of spending precious time addressing individual issues.
To address all the concerns discussed above, a fully balanced military aerospace compute system should have characteristics including high performance for demanding applications such as synthetic aperture radar and image processing, scalability from one to thousands of processors, the ability to meet a wide range of SWaP requirements, and a unified development environment that programs all the components seamlessly.
The ability to utilize ANSI standard programming languages such as C and Fortran and to utilize the same executable on ground (data center) and deployed (UAV/airborne) platforms is also important, as well as the utilization of COTS components that lower hardware costs due to higher commercial volumes and ensures that the solution is well-supported and stable.
SRC Computers has deployed a programmer-friendly unified architecture in the military aerospace market. The SRC architecture is built around the reconfigurable MAP processor modules and microprocessors tightly coupled as peers with an integrated high-bandwidth interconnect.
The SRC MAP processors perform the heavy compute required for military aerospace applications, while the traditional microprocessors allow for the use of standard interfaces and well-understood programming models.
Utilizing an easy-to-use development environment, the programmer can build a single unified code base that will run on traditional microprocessors or the MAP module. Developers can then select from a variety of packaging and enclosure options, all of which are architecturally identical. Enclosures include standard desk-side and rack-mount systems to portable air-cooled and environmentally sealed enclosures designed to fly well above 50,000 ft.
Mark B. Tellez, Director of Business Development, SRC Computers, wrote this article for Aerospace Engineering.